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YMU759
MA-2
Outline
PRELIMINARY
May 8 .2000
YMU759 is a synthesis LSI for portable telephone that is capable of playing high quality music by utilizing FM synthesizer and ADPCM decoder that are included in this device. As a synthesis, YMU759 is equipped with Yamaha's original FM synthesizer, with which the device is capable of simultaneously generating up to 16 voices with different tones. Since the device is capable of generating ADPCM data simultaneously synchronous with the play of the FM synthesizer, various sampled voices can be used as sound effects. Since the play data of YMU759 are interpreted at anytime through FIFO, the length of the data (playing period) is not limited, so the device can flexibly support applications such as incoming call melody distribution service. The hardware sequencer built in this device allows playing of complex music without giving excessive load to the CPU of the portable telephones. Moreover, the registers of the FM synthesizer can be operated directly for real time sound generation, allowing, for example, utilization of various sound effects when using the game software installed in the portable telephone.
Features
Equipped with FM sound generator function and ADPCM playback function. Number of voices simultaneously generated When only 2-operator tones are used: up to 16 voices can be generated simultaneously. When only 4-operator tones are used: up to 8 voices can be generated simultaneously. Built-in 4-bits 1ch ADPCM decoder, and supports two kinds of sampling frequency, 4 kHz and 8 kHz. Built-in output 550mW(AVDD=3.6V) speaker amplifier:
Built-in hardware sequencer. Built-in circuit for sound quality correcting equalizer.
Supports stereophonic output. Built-in 16-bit stereophonic D/A converter. Provided with a stereophonic analog output terminal for headphone. 4 wire serial interface or 12 wire parallel interface can be selected. PLL is built-in to support master clock input in 2 MHz to 20 MHz range. Supports power down mode. (Typical current: 1 uA or less)
Power supply is divided into analog power supply for speaker amplifier and power supply for the others. Analog power supply for speaker amplifier (SPVDD): 2.7V~4.5V(Typ 3.6V). Digital power supply for the others(VDD): 2.7V~3.3V(Typ 3.0V)
32-pin plastic QFN.
The contents of this booklet are target specifications and they are subject to change without a prior notice. Please check the finalized specifications before actually using this LSI.
YAMAHA CORPORATION
YMU759 CATALOG CATALOG No.:LSI-4MU759A0 2000.5
YMU759
Terminal configuration
SPOUT2
SPOUT1
EXT2
25
D2
D3
24 23 22
D4
D5
D6
21 20 19 18 17 16 15 14 13 12 11 10
D7
D1 D0 /WR SDIN (/CS) SYNC (A0) SCLK (/RD) SDOUT
26 27 28 29 30 31 32 1 2 3 4 5 6 7 8 9
SPVSS SPVDD EQ3 EQ2 EQ1 HPOUT-R HPOUT-L/MONO
CLKI
EXT1
<32pin QFN Top View>
/IRQ
/RST
-2-
IFSEL
PLLC
VDD
VSS
VREF
YMU759
Terminal functions
No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Name CLKI
EXT1
I/O Ish O O Ish I A A A A A A A A A O I/O I/O I/O I/O I/O I/O I/O
I/O Clock input (2~20MHz) External device control terminal 1 Interruption output Hardware reset input CPU I/F selection
Function
/IRQ /RST IFSEL PLLC VDD VSS VREF HPOUT-L / MONO HPOUT-R EQ1 EQ2 EQ3
SPVDD
L: Serial I/F, H: Parallel I/F
Connection of capacitor for built in PLL Connect 0.01 F (expected) capacitor between this terminal and VSS. Digital power supply (Typically +3.0V) Connect 0.1 F and 4.7 F capacitors between this terminal and VSS Ground Analog reference voltage. Connect 0.1 F capacitor between this terminal and VSS Headphone L channel output: can be switched to mono through register setting Headphone R channel output Equalizer terminal 1 Equalizer terminal 2 Equalizer terminal 3 Analog power supply (Typically +3.6 V) Connect 0.1 F and 4.7 F capacitors between this terminal and SPVSS Analog ground for speaker amplifier Speaker terminal 1 Speaker terminal 2 External device control terminal 2 Parallel I/F data bus 7 Parallel I/F data bus 6 Parallel I/F data bus 5 Parallel I/F data bus 4 (To be open when IFSEL=L) Parallel I/F data bus 3 (To be open when IFSEL=L) Parallel I/F data bus 2 (To be open when IFSEL=L) Parallel I/F data bus 1 (To be open when IFSEL=L) Parallel I/F data bus 0 (To be open when IFSEL=L) Parallel I/F write pulse (To be open when IFSEL=L) IFSEL= L Serial I/F data input IFSEL= H Parallel I/F chip select input IFSEL= L Serial I/F data take-in signal IFSEL= H Parallel I/F address signal IFSEL= L Serial I/F bit clock input IFSEL= H Parallel I/F read pulse Serial I/F data output (Pull up resistance is necessary for the outside)
SPVSS SPOUT1 SPOUT2 EXT2
D7 D6 D5
D4 D3 D2 D1 D0 /WR SDIN (/CS) SYNC (A0) SCLK (/RD) SDOUT
Ish Ish Ish Ish OD
Comment: Ish= Schmitt input, OD= open drain terminal, A= Analog terminal
-3-
YMU759
CLKI VDD VSS HPOUT-R
HP Vol R
Block diagram
PLLC
/RST
PLL
Timing Generator
HP Vol L
SCLK SYNC SDIN
Power Down Control
Register SDOUT
FM Synthesizer
Sequencer
CPU I/F
/CS A0 /WR
FM FIFO x4
16 sound generated simultaneously (Fs=49.7kHz)
Vol
Lch Lch Rch EQ Vol
HPOUT-L / MONO
SELECT
EQ1
Vol
16-bit DAC
Rch
VREF
EQ2 +
Sequencer
/RD D0 - D7
ADPCM Seq FIFO
ADPCM Playback
(Fs= 4 or 8 kHz)
EQ3
Vol & LPF SP Vol
IFSEL
ADPCM wave FIFO
4
Mix & Select /IRQ EXT1 EXT2
LED control Vibrator control VREF TIMER
SPOUT1
SPOUT2
VREF
Analog power supply for speaker amplifier
SPVDD
-4-
SPVSS
YMU759
Outline of blocks
Explanation about outline of built-in each blocks and flow of the signal are follows.
Clock Generate FM Sound Generator DAC
Headphone Output
Register CPU Interface FIFO
Hardware Sequencer ADPCM Playback
EQ Amplifier
External Parts
Speaker Amplifier
CPU interface Receives commands send from external CPU, interprets the contents, and then writes them into registers by index address. Controls reading of designated register data. As interfaces for controlling YMU759, 4 wire serial and 12 wire parallel interfaces are provided, which can be selected through IFSEL terminal. Registers Register groups that control the LSI except for sequence data. FM tone register data, various volumes and other control data are store here. FIFO Sequence data to move hardware sequencer and ADPCM wave data are stored in FIFO. This device is equipped with four FIFOs for FM and two FIFOs for ADPCM. The FIFOs for FM stores sequence data and those for ADPCM stores sequence and waveform data. The size of FIFOs for FM is 96 bytes, the one for ADPCM data is 384 bytes, and the one for sequence data is 32 bytes. Hardware sequencer FIFO is provided as a previous stage of the sequencer which reads sequence data from FIFO to control FM and ADPCM sections. The sequence data are compatible with SMAF(Synthetic music Mobile Application Format) proposed by yamaha. FM synthesis This is a synthesis that uses Yamaha's original FM system. It is able to generate up to 16 voices simultaneously. This section plays in accordance with commands from the sequencer. It can also play by directly controlling various registers without using the sequencer. The sampling frequency is 49.7 kHz that complies with stereophonic sound. ADPCM playback This section decodes 4 bit ADPCM data to 16 bit data by using the sampling frequency of 4 kHz or 8 kHz. It can playback one voice. It playback according to command from sequencer. And it can playback to control various register directly without using sequencer.
-5-
YMU759
DAC Converts digital signal from FM and ADPCM section to analog voice signal with resolution of 16 bits. Headphone output This section supports stereophonic analog output for the headphone. Monaural output is available by changing the setting. And built in volume adjust output level. EQ amplifier This section is used to set the response of filter or the gain by externally connecting a resistor and capacitor. Speaker amplifier A speaker amplifier is built in this device, which maximum output is 550 mW at AVDD=3.6 V. Built in volume adjust output level in front of amplifier. High ripple removal rate is provided. And, include protection circuit for short of speaker output terminal. (The final specification may not include the short-circuit protection circuit.) Clock generate This block makes a necessary clock by increasing 2 to 20 MHz clock inputted through CLK1 terminal using the built-in PLL. The clock generated in this section is supplied to the inside of digital circuit.
-6-
YMU759
Electrical Characteristics
Absolute maximum rating Item
Power supply voltage (analog) Power supply voltage (digital) Analog input voltage Digital input voltage Operating ambient temperature Storage temperature
Symbol
SPVDD VDD VINA VIND TOP TSTG
Min.
-0.3 -0.3 -0.3 -0.3 -20 -50
Max.
6.0 4.2 SPVDD+0.3 VDD+0.3 85 125
Unit
V V V V C C
Note: VSS = SPVSS = 0V
Recommended operating conditions Item
Operating voltage (Speaker amp) Operating voltage (The others) Operating ambient temperature
Symbol
SPVDD VDD TOP
Min.
2.7 2.7 -20
Typ.
3.6 3.0 25
Max.
4.5 3.3 85
Unit
V V C
Note: VSS = SPVSS = 0V
DC characteristics
Item
Input voltage "H" level Input voltage "L" level Output voltage "H" level Output voltage "L" level Schmitt width Input leakage current Input capacity
Symbol
VIH1 VIL1 VOH VOL Vsh IL CI
Condition
Min.
0.7 x Vdd -
Typ.
1.0
Max
0.2 x VDD 0.4
Unit
V V V V V
IOL = *1 IOH = *1
0.8 x Vdd -
-10
10 10
A
pF
Note: TOP= -20 ~ 85C, VDD=3.00.3 V, Capacitor load=50 pF.
*1 IOL=and IOH= 2 mA for /IRQ, SDOUT and D0 to D7 (Only IOL for SDOUT) IOL=IOH= 6 mA for EXT1 and EXT2.
-7-
YMU759
AC characteristics /RST, CLKI Item
/RST active "L" pulse width CLKI frequency CLKI rise time / fall time CLKI duty
Symbol
TRSTW 1 / Tfreq Tr / Tf Th/Tfreq
Min.
1024 2
Typ.
Max.
Unit
x CLKI
20 30
MHz ns
%
30
50
70
Note: TOP=-20 ~ 85C, VDD=3.00.3 V, Capacitor load=50 pF.
TRSTW
/RST
VIL= 0.2*DVDD
VIH= 0.7*DVDD
Th
Tf
CLKI
Tr Tfreq
VIH= 0.7*DVDD VIL= 0.2*DVDD
Serial I/F Item
SCLK clock period SCLK "L" pulse width SCLK "H" pulse width SCLK rise time SCLK fall time SYNC "H" pulse width SYNC "L" pulse width SYNC / SDIN rise time SYNC / SDIN fall time SYNC delay time SUNC -> SCLK setup time SDIN setup time SDIN hold time SDOUT delay time Read Command clear time Read wait time
Symbol
Tclk_period Tclk_low Tclk_high Trise_clk Tfall_clk Tsync_high Tsync_low Trise Tfall Tdelay_SYNC Tsetup_SYNC Tsetup Thold Tdelay_SDOUT Trend Trd_wait
Min.
80 20 20
Typ.
Max.
Unit
ns ns ns
30 30 30 30 30 30 0 50 20 20 30 50 300 -
ns ns ns ns ns ns ns ns ns ns ns ns ns
Note: TOP=-20 ~ 85C, VDD=3.00.3 V, Capacitor load=50 pF.
-8-
YMU759
Tclk_high Tfall_clk Measurement point VIH = 0.7*VDD VIL = 0.2*VDD VOH= 0.8*VDD VOL = 0.4V Trise_clk Tclk_period Tclk_low
SCLK
Tsync_high
SYNC SDIN
Trise Tfall
SCLK
Tsetup_SDIN Thold_SDIN Tsetup_SYNC
SDIN
Tdelay_SYNC
SYNC
SYNC_low
Trend
SCLK
Tdelay_SDOUT
SDOUT
LSB
SYNC
SYNC_low
SYNC
Trd_wait
SCLK
SDOUT
MSB
-9-
YMU759
Parallel I/F (write cycle) Item
Chip select width Address setup time Write pulse width Data setup time Data hold time
Symbol
TCSW TAS TWW TWDS TWDH
Min.
100 10 50 30 0
Max.
Unit
ns ns ns ns ns
Note: TOP=-20 ~ 85C, VDD=3.00.3 V, Capacitor load=50 pF. (Read cycle) Item
Chip select width Address setup time Read pulse width Read data access time Data hold time
Symbol
TCSR TAS TRW TACC TRDH
Min.
100 0 80
Max.
Unit
ns ns ns
70 10 50
ns ns
Note: TOP=-20 ~ 85C, VDD=3.00.3 V, Capacitor load=50 pF. Write cycle
A0
TCSW
/CS
TAS TWW
/WR
TWDS TWDH
D0 - D7
Invalid
Valid
Invalid
Note: TCSW, TWW, and TWDH are defined with respect to the moment /CS or /WR becomes High level.
Measurement point VIH = 0.7*VDD VIL = 0.2*VDD VOH= 0.8*VDD VOL = 0.4V
-10-
YMU759
Read cycle
A0
TCSR
/CS
TAS TRW
/RD
TACC TRDH
D0 - D7
Valid
Note: TACC is defined with respect to the moment /CS or /RD becomes Low level later. TCSR, TRW and TRDH are defined with respect to the moment /CS or /RD becomes High level.
Measurement point VIH = 0.7*VDD VIL = 0.2*VDD VOH= 0.8*VDD VOL = 0.4V
Power consumption Item
VDD section (normal operation) SPVDD section (no voice) SPVDD section 8 load and 500 mW output Power down mode (VDD + SPVDD)
Min.
Typ.
15 5(expectation) TBD 1
Max.
Unit
mA mA mA
TBD
A
Note: TOP=-20 ~ 85C, VDD=3.00.3 V, SPVDD=3.6V.
-11-
YMU759
Analog characteristics SP amplifier Item
Gain setting (fixed) Minimum load resistance (RL) Maximum output voltage amplitude (RL=8 ) Maximum output power (RL=8 , THD+N<=0.05%) Maximum output power (RL=8 , THD+N<=1.0%) THD + N (RL=8 , f=1kHz, output=500 mW) Noise at no signal (A-filter; filter equalize feeling of hearing ) PSRR (f=1kHz)
Min.
Typ.
Max.
Unit
Times Vp-p mW mW % dBv dB
2
8 6.0 520 600 TBD -90 TBD
Note: TOP=25 C, VDD=3.0 V and SPVDD=3.6 V. EQ amplifier Item
Gain setting range Maximum output current Maximum output voltage amplitude THD + N (f=1kHz) Noise at no signal (A-filter) Input impedance 10 -90 120 1.5 TBD
Min.
Typ.
Max.
30
Unit
dB A Vp-p % dBv M
Note: TOP=25 C, VDD=3.0 V and SPVDD=3.6 V. SP Volume Item
Volume setting range Volume step width Noise at no signal (A-filter) THD + N (f=1kHz)
Min.
-30
Typ.
Max.
0
Unit
dB dB dBv
1 -90 TBD
%
Note: TOP=25 C, VDD=3.0 V and SPVDD=3.6 V
-12-
YMU759
EQ Volume Item
Volume setting range Volume step width Noise at no signal (A-filter) Maximum output current Maximum output voltage amplitude Output impedance 120 1.5 300 600
Min.
-30
Typ.
Max.
0
Unit
dB dB dBv A Vp-p
1 -90
Note: TOP=25C, VDD=3.0V and SPVDD=3.6V. HP Volume Item
Volume setting range Volume step width Noise at no signal (A-filter) Maximum output current Maximum output voltage amplitude Output impedance 120 1.5 300 600
Min.
-30
Typ.
Max.
0
Unit
dB dB dBv A Vp-p
1 -90
Note: TOP=25C, VDD=3.0V and SPVDD=3.6V VREF Item
VREF voltage
Min.
Typ.
Max.
Unit
VDD
x1/2
Note: TOP=25C, VDD=3.0V and SPVDD=3.6V.
DAC Item
Resolution Full scale output voltage THD+N (f= 1kHz) Noise at no signal (A-filter) Frequency response (f=50 Hz to 12 kHz) -0.5 -90 +0.5
Min.
Typ.
16 1.5
Max.
Unit
Bit Vp-p
0.5
% dBv dB
Note: TOP=25C, VDD=3.0V and SPVDD=3.6V.
-13-
YMU759
External dimensions of package
-14-
YMU759
IMPORTANT NOTICE
1. Yamaha reserves the right to make changes to its Products and to this document without notice. The information contained in this document has been carefully checked and is believed to be reliable. However, Yamaha assumes no responsibilities for inaccuracies and makes no commitment to update or to keep current the information contained in this document. 2. These Yamaha Products are designed only for commercial and normal industrial applications, and are not suitable for other uses, such as medical life support equipment, nuclear facilities, critical care equipment or any other application the failure of which could lead to death, personal injury or environmental or property damage. Use of the Products in any such application is at the customer's sole risk and expense. 3. YAMAHA ASSUMES NO LIABILITY FOR INCIDENTAL, CONSEQUENTIAL OR SPECIAL DAMAGES OR INJURY THAT MAY RESULT FROM MISAPPLICATION OR IMPROPER USE OR OPERATION OF THE PRODUCTS. 4. YAMAHA MAKES NO WARRANTY OR REPRESENTATION THAT THE PRODUCTS ARE SUBJECT TO INTELLECTUAL PROPERTY LICENSE FROM YAMAHA OR ANYTHIRD PARTY, AND YAMAHA MAKES NO WARRANTY OR REPRESENTATION OF NON-INFRINGEMENT WITH RESPECT TO THE PRODUCTS. YAMAHA SPECIFICALLY EXCLUDES ANY LIABILITY TO THE CUSTOMER OR ANY THIRD PARTY ARISING FROM OR RELATED TO THE PRODUCTS' INFRINGEMENT OF ANY THIRD PARTY'S INTELLECTUAL PROPERTY RIGHTS, INCLUDING THE PATENT, COPYRIGHT, TRADEMARK OR TRADE SECRET RIGHTS OF ANY THIRD PARTY. 5. EXAMPLES OF USE DESCRIBED HEREIN ARE MERELY TO INDICATE THE CHARACTERISTICS AND PERFORMANCE OF YAMAHA PRODUCTS. YAMAHA ASSUMES NO RESPONSIBILITY FOR ANY INTELLECTUAL PROPERTY CLAIMS OR OTHER PROBLEMS THAT MAY RESULT FROM APPLICATIONS BASED ON THE EXAMPLES DESCRIBED HEREIN. YAMAHA MAKES NO WARRANTY WITH RESPECT TO THE PRODUCTS, EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR USE AND TITLE.
Note) The specifications of this product are subject to change without notice.
Agency
Address inquiries to:
Semiconductor Sales & Marketing Department
Head Office 203, Matsunokijima, Toyooka-mura, Iwata-gun, Shizuoka-ken, 438-0192 Tel. +81-539-62-4918 Fax. +81-539-62-5054 Tokyo Office 2-17-11, Takanawa, Minato-ku, Tokyo, 108-8568 Tel. +81-3-5488-5431 Fax. +81-3-5488-5088 Osaka Office Nanba Tsuzimoto Nissei Bldg. 4F 1-13-17, Nanbanaka, Naniwa-ku, Osaka City, Osaka, 556-0011 Tel. +81-6-6633-3690 Fax. +81-6-6633-3691
-15-

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